Wiki d'activités IMA - Contributions de l’utilisateur [fr]

Carte papillon

2016-07-19T12:05:10Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Une ligne pour former l'envergure maximale du papillon (la ligne verte). 
* Une ligne pour former l'envergure minimale du papillon (la ligne rouge). 
* Une ligne pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 
Je n'ai pas schématisé les 3 dernières lignes de LEDs qui serviront pour les décorations des ailes. Mais ce seront des tâches modélisées par des petits groupes de 3 LEDs qui changeront selon le choix de ligne d'aile fait par le programme. 
Nous aurons ainsi 3 motifs différents lors de l'animation de battement d'aile. Pour encore mieux visualiser ces changements chaque ligne d'aile aura sa propre couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 40
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 58
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 50
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| 1
| Condensateur 0.33 µF
| Farnell
| 08053C334KAT2A
| http://fr.farnell.com/avx/08053c334kat2a/condensateur-mlcc-x7r-330nf-25v/dp/1833878
|-
| 1
| Condensateur 0.1 µF
| Farnell
| 08055F104KAT2A
| http://fr.farnell.com/avx/08055f104kat2a/condensateur-mlcc-x8r-100nf-50v/dp/1301790
|-
| ?
| Transistors NPN
| Farnell
| MMBT2222A-7-F
| http://fr.farnell.com/diodes-inc/mmbt2222a-7-f/transistor-npn-sot23/dp/1773626
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-19T08:52:34Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Une ligne pour former l'envergure maximale du papillon (la ligne verte). 
* Une ligne pour former l'envergure minimale du papillon (la ligne rouge). 
* Une ligne pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 
Je n'ai pas schématisé les 3 dernières lignes de LEDs qui serviront pour les décorations des ailes. Mais ce seront des tâches modélisées par des petits groupes de 3 LEDs qui changeront selon le choix de ligne d'aile fait par le programme. 
Nous aurons ainsi 3 motifs différents lors de l'animation de battement d'aile. Pour encore mieux visualiser ces changements chaque ligne d'aile aura sa propre couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 40
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 58
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 50
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| 1
| Condensateur 0.33 µF
| Farnell
| 08053C334KAT2A
| http://fr.farnell.com/avx/08053c334kat2a/condensateur-mlcc-x7r-330nf-25v/dp/1833878
|-
| 1
| Condensateur 0.1 µF
| Farnell
| 08055F104KAT2A
| http://fr.farnell.com/avx/08055f104kat2a/condensateur-mlcc-x8r-100nf-50v/dp/1301790
|-
| ?
| Transistors NPN
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-18T11:25:30Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Une ligne pour former l'envergure maximale du papillon (la ligne verte). 
* Une ligne pour former l'envergure minimale du papillon (la ligne rouge). 
* Une ligne pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 
Je n'ai pas schématisé les 3 dernières lignes de LEDs qui serviront pour les décorations des ailes. Mais ce seront des tâches modélisées par des petits groupes de 3 LEDs qui changeront selon le choix de ligne d'aile fait par le programme. 
Nous aurons ainsi 3 motifs différents lors de l'animation de battement d'aile. Pour encore mieux visualiser ces changements chaque ligne d'aile aura sa propre couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 22
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 28
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 24
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| 1
| Condensateur 0.33 µF
| Farnell
| 08053C334KAT2A
| http://fr.farnell.com/avx/08053c334kat2a/condensateur-mlcc-x7r-330nf-25v/dp/1833878
|-
| 1
| Condensateur 0.1 µF
| Farnell
| 08055F104KAT2A
| http://fr.farnell.com/avx/08055f104kat2a/condensateur-mlcc-x8r-100nf-50v/dp/1301790
|-
| ?
| Transistors NPN
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-18T11:23:50Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Une ligne pour former l'envergure maximale du papillon (la ligne verte). 
* Une ligne pour former l'envergure minimale du papillon (la ligne rouge). 
* Une ligne pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 
Je n'ai pas schématisé les 3 dernières lignes de LEDs qui serviront pour les décorations des ailes. Mais ce seront des tâches modélisées par des petits groupes de 3 LEDs qui changeront selon le choix de ligne d'aile fait par le programme. 
Nous aurons ainsi 3 motifs différents lors de l'animation de battement d'aile. Pour encore mieux visualiser ces changements chaque ligne d'aile aura sa propre couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 22
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 28
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 24
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateur 0.33 µF
| Farnell
| 08053C334KAT2A
| http://fr.farnell.com/avx/08053c334kat2a/condensateur-mlcc-x7r-330nf-25v/dp/1833878
|-
| ?
| Condensateur 0.1 µF
|
|
|
|-
| ?
| Transistors NPN
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-18T11:14:05Z

Kle-van- : /* Premières réflexions */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Une ligne pour former l'envergure maximale du papillon (la ligne verte). 
* Une ligne pour former l'envergure minimale du papillon (la ligne rouge). 
* Une ligne pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 
Je n'ai pas schématisé les 3 dernières lignes de LEDs qui serviront pour les décorations des ailes. Mais ce seront des tâches modélisées par des petits groupes de 3 LEDs qui changeront selon le choix de ligne d'aile fait par le programme. 
Nous aurons ainsi 3 motifs différents lors de l'animation de battement d'aile. Pour encore mieux visualiser ces changements chaque ligne d'aile aura sa propre couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 22
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 28
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 24
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateurs
|
|
|
|-
| ?
| Transistors NPN
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Fichier:Papillon.png

2016-07-18T11:08:17Z

Kle-van- : a téléversé une nouvelle version de « Fichier:Papillon.png »

image des leds utilisées

Carte papillon

2016-07-13T12:23:44Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former l'envergure maximale du papillon (la ligne verte qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne rouge qui sera reproduite à l'identique aussi). 
* Deux lignes pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 22
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 28
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 24
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateurs
|
|
|
|-
| ?
| Transistors NPN
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T12:20:35Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former l'envergure maximale du papillon (la ligne verte qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne rouge qui sera reproduite à l'identique aussi). 
* Deux lignes pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 22
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 28
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 24
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateurs
|
|
|
|-
| ?
| Transistors
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T12:16:30Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former l'envergure maximale du papillon (la ligne verte qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne rouge qui sera reproduite à l'identique aussi). 
* Deux lignes pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 22
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 28
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 24
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateurs
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T12:15:39Z

Kle-van- : /* Premières réflexions */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former l'envergure maximale du papillon (la ligne verte qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne rouge qui sera reproduite à l'identique aussi). 
* Deux lignes pour former l'envergure intermédiaire ( la ligne jaune). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des différentes lignes en suivant l'ordre décroissant d'envergure dans un premier temps puis l'ordre croissant. On finira toujours l'animation des ailes avant de passer en veille en allumant la ligne verte qui indique la posture du papillon au repos. 
Chaque ligne d'aile aura sa propre couleur pour les différencier. 

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 14
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 12
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 10
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateurs
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Fichier:Papillon.png

2016-07-13T12:11:10Z

Kle-van- : a téléversé une nouvelle version de « Fichier:Papillon.png »

image des leds utilisées

Carte papillon

2016-07-13T11:24:04Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 
Chaque ligne d'aile aura sa propre couleur pour les différencier et le corps aura aussi sa couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 14
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 12
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 10
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| ?
| Condensateurs
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T11:23:16Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 
Chaque ligne d'aile aura sa propre couleur pour les différencier et le corps aura aussi sa couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| Atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 14
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 12
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 10
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T11:22:57Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 
Chaque ligne d'aile aura sa propre couleur pour les différencier et le corps aura aussi sa couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 14
| Leds rouges
| Farnell
| 150060RS75000
| http://fr.farnell.com/wurth-elektronik/150060rs75000/led-0603-rouge-250mcd-625nm/dp/2322071
|-
| 12
| Leds vertes
| Farnell
| HSMG-C170
| http://fr.farnell.com/broadcom-limited/hsmg-c170/led-verte/dp/5790852
|-
| 10
| Leds jaunes
| Farnell
| HSMY-C170
| http://fr.farnell.com/avago-technologies/hsmy-c170/led-jaune/dp/5790876
|-
| ?
| Résistances
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T11:18:06Z

Kle-van- : /* Liste de composants */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 
Chaque ligne d'aile aura sa propre couleur pour les différencier et le corps aura aussi sa couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| 14
| Leds rouges
|
|
|
|-
| 12
| Leds vertes
|
|
|
|-
| 10
| Leds jaunes
|
|
|
|-
| ?
| Résistances
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T11:14:28Z

Kle-van- : /* Premières réflexions */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 
Chaque ligne d'aile aura sa propre couleur pour les différencier et le corps aura aussi sa couleur.

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| ?
| Leds rouges
|
|
|
|-
| ?
| Leds vertes
|
|
|
|-
| ?
| Leds jaunes
|
|
|
|-
| ?
| Résistances
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T11:13:18Z

Kle-van- : /* Premières réflexions */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]] 
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| ?
| Leds rouges
|
|
|
|-
| ?
| Leds vertes
|
|
|
|-
| ?
| Leds jaunes
|
|
|
|-
| ?
| Résistances
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Carte papillon

2016-07-13T11:13:00Z

Kle-van- : /* Premières réflexions */

==Cahier des charges==

===Présentation générale du projet===

Il vous est demandé de créer une carte électronique "papillon". Cette carte à destination ludique représente un papillon dont les ailes colorées sont stylisées par des LEDs. Vous veillerez à l'aspect esthétique de la carte en disposant les composants pour représenter le corps de l'insecte et en prévoyant une découpe de la carte en forme de papillon.

La carte sera du type CMS avec un micro-contrôleur ATMega328P alimenté par une pile de 9V. Utilisez toutes les sorties PWM du micro-contrôleur pour représenter les lignes des ailes. Les ailes doivent être représentées dans différentes positions pour simuler le vol du papillon.

La carte comportera un circuit accéléromètre pour permettre une interaction avec l'utilisateur. En particulier en cas de mouvement les ailes doivent s'animer. Quand le mouvement cesse, le papillon se pose avec une animation adaptée. Quand le papillon n'est pas manipulé, les ailes s'animent toutes seules mais de moins en moins souvent et de moins en moins longtemps. Le papillon finit par se mettre en veille.

Le programme sera écrit en C pour <tt>avr-gcc</tt>.

===Liste de matériel===

==Avancement du Projet==

===Premières réflexions===
Le projet va nécessiter de gérer différentes lignes de LEDs (au nombre de 6 avec toutes les sorties pwm),ainsi que lire et interpréter les données d'un accéléromètre pour savoir quand mettre en marche ces lignes de LEDs. 
Le premier point important est l'alimentation 9V qui nécessite donc une adaptation puisque l'atmega328p n'est fonctionnel qu'avec une alimentation situé entre 1.8V et 5.5V. 
Je vais donc partir sur l'utilisation d'un régulateur de tension qui permettra d'avoir une alimentation stable sans fluctuation de tension comme aurait pu l'apporter un montage diviseur de tension. 
Je devrai gérer les données de l'accéléromètre par lecture de ces données via une interface I2C. Je ne sais pas encore si j'aurais besoin d'utiliser les interruptions mais ceci viendra au moment de la programmation de la carte papillon. 
L'idée serait d'afficher un papillon battant des ailes à l'aide de 6 lignes de LEDs. La configuration à laquelle j'ai pensé est la suivante: 
* Deux lignes pour former le corps du papillon qui seront donc toujours allumées sauf en cas de mise en veille du papillon.Sur l'image ci dessous les lignes rouges et vertes. 
* Deux lignes pour former l'envergure maximale du papillon (la ligne jaune qui sera reproduite à l'identique du côté gauche). 
* Deux lignes pour former l'envergure minimale du papillon ( la ligne violette qui sera reproduite à l'identique aussi). 
[[Fichier:Papillon.png]]
Pour donner l'illusion d'un battement d'ailes on alternera alors l'allumage des lignes jaunes et violettes. 

==Livrables==

===Schématique===

===Liste de composants===
{| class="wikitable"
! Quantité !! Description !! Vendeur !! Référence Fabricant !! URL
|-
| 1
| Accéléromètre MEMS 3 axes
| Farnell
| MMA8652FCR1
| http://fr.farnell.com/nxp/mma8652fcr1/accelerometre/dp/2377758
|-
| 1
| atmega328P
| Farnell
| ATMEGA328P-AU
| http://fr.farnell.com/atmel/atmega328p-au/mcu-8bit-atmega-20mhz-tqfp-32/dp/1715486
|-
| ?
| Leds rouges
|
|
|
|-
| ?
| Leds vertes
|
|
|
|-
| ?
| Leds jaunes
|
|
|
|-
| ?
| Résistances
|
|
|
|-
| 1
| Régulateur de tension 5V
| Farnell
| L7805ACD2T-TR
| http://fr.farnell.com/stmicroelectronics/l7805acd2t-tr/regulateur-5v-cms/dp/1467759
|-
|}

===Programme C===

===Carte électronique===

Fichier:Papillon.png

2016-07-13T11:04:47Z

Kle-van- : image des leds utilisées

image des leds utilisées

Carte papillon

2016-07-13T10:47:23Z

Kle-van- : /* Liste de composants */

Carte papillon

2016-07-13T10:38:15Z

Kle-van- : /* Premières réflexions */

Carte papillon

2016-07-13T10:28:35Z

Kle-van- : /* Liste de composants */

Carte papillon

2016-07-13T08:23:39Z

Kle-van- : /* Premières réflexions */

Carte papillon

2016-07-13T08:23:13Z

Kle-van- : /* Avancement du Projet */

Carte papillon

2016-07-13T08:07:44Z

Kle-van- : /* Liste de composants */

Carte papillon

2016-07-13T08:06:17Z

Kle-van- : /* Liste de composants */

InitRech 2015/2016, sujet 17

2016-06-19T15:13:58Z

Kle-van- : /* Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements */

= <center>'''Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements'''</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

=== State of the art ===
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

=== Presentation and application ===
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

== '''Applications''' ==
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system. 

--[[Utilisateur:Kle-van-|Kevin LE VAN PHUNG]] 19 juin 2016 à 17:12 (CEST)

InitRech 2015/2016, sujet 17

2016-06-19T15:13:42Z

Kle-van- : /* Applications */

InitRech 2015/2016, sujet 17

2016-06-19T15:13:09Z

Kle-van- : /* Applications */

InitRech 2015/2016, sujet 17

2016-06-19T15:12:42Z

Kle-van- : /* Applications */

InitRech 2015/2016, sujet 17

2016-06-19T15:12:04Z

Kle-van- : /* Applications */

= <center>'''Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements'''</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

=== State of the art ===
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

=== Presentation and application ===
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

== '''Applications''' ==
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system. 

--[[Utilisateur:Kle-van-|Kle-van-]] 19 juin 2016 à 17:12 (CEST)Kevin LE VAN PHUNG

InitRech 2015/2016, sujet 17

2016-06-19T15:08:30Z

Kle-van- : /* Main Contribution */

InitRech 2015/2016, sujet 17

2016-06-19T15:05:10Z

Kle-van- : /* Presentation and application */

= <center>'''Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements'''</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

=== State of the art ===
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

=== Presentation and application ===
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

== '''Applications''' ==
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T15:04:58Z

Kle-van- : /* State of the art */

= <center>'''Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements'''</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

=== State of the art ===
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

== '''Applications''' ==
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T15:04:28Z

Kle-van- : /* Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements */

= <center>'''Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements'''</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

== '''Applications''' ==
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T15:04:01Z

Kle-van- : /* Applications */

= <center>Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

== '''Applications''' ==
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T15:03:44Z

Kle-van- : /* Main Contribution */

= <center>Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

== '''Main Contribution''' ==
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T15:03:20Z

Kle-van- : /* Synthesis */

= <center>Fast and Accurate Embedded Systems Energy Characterization Using Non-intrusive Measurements</center> =
== '''Synthesis''' ==
=== Introduction ===
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:54:01Z

Kle-van- : /* Applications */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:53:47Z

Kle-van- : /* Main Contribution */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:53:24Z

Kle-van- : /* Synthesis */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:52:23Z

Kle-van- : /* Applications */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...). 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:51:27Z

Kle-van- : /* Introduction */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:51:16Z

Kle-van- : /* Introduction */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:50:54Z

Kle-van- : /* Introduction */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:50:39Z

Kle-van- : /* Introduction */

= '''Synthesis''' =
== Introduction ==
\tThis paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:48:40Z

Kle-van- : /* Main Contribution */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:47:38Z

Kle-van- : /* Main Contribution */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:43:34Z

Kle-van- : /* Applications */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.

InitRech 2015/2016, sujet 17

2016-06-19T13:43:13Z

Kle-van- : /* Main Contribution */

= '''Synthesis''' =
== Introduction ==
This paper is the proposition of a method of energy characterization using non-intrusive measurements. 
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work. 
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level. 
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype. 

== State of the art ==
The second section of the paper is about the state of the art of the non-intrusive measurement. 
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method. 

For the first criterion there are many methods that can be used to measure the energy consumption : 
* For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate. 
* At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known). 
* At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform. 

When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions). 

== Presentation and application ==
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
 

Finally, the fourth section is a case study of a model construction using the method of the third section. 
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers). 
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases. 
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method. 
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one. 

= '''Main Contribution''' =
As we have seen it so far, VLSI circuits are organized according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level. 
For this method, we will need to be in architectural abstraction level. 
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl. <math>E_{app}=\sum E_{bl}</math> 
Each block has its own energy consumption model and for the CPU block to suit better to software development, we will write it at the instruction level of abstraction. <math>E_{CPU}= E_{insn}+E_{cache}+E_{MMU}</math> 
With Einsn the energy consumed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption. 
We finally got : <math>E_{app}= E_{insn}+E_{cache}+E_{MMU}+\sum E_{bl}</math> 
 
This method must have a time slot energy consumption and the chosen time slot is the CPU instruction execution for two main reasons : 
* It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system. 
* The interrupt requests are managed at the end of this time slot. 
 
The only thing left is to define every parameter that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit. 
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation. 

= '''Applications''' =
Since the paper deals with a method of measurement on embedded systems, It can only apply to applications in this field. 
However, there are some limits that I will expose on this part of my presentation. 
Obviously, this method can be applied on every single embedded system that we can conceive but the limits reside in the peculiarities of this method. 
Indeed, we know that the error rate is a little less than 10%. 
For an application in the car industry or in ground-communication this is not a big deal because an error around 10% can quickly be compensated by using another power supply. 
Nevertheless, for an application into a space program or for medical and military uses, we need to be very accurate in order to save both energy and space that can be used in other purposes (instruments in a spaceship, reducing the size of military and medical gear). 
Another limit we can see is that we won't use this method in very simple embedded systems for two main reasons : 
* This kind of system is often powered by standard power source and does not really need a deep study of its energy consumption. 
* This kind of system is easier to analyse by other methods maybe at the transistor level of abstraction where we can ally the same speed of simulation and a far more accurate result concerning the consumption of each part of the system (peripherals, bus, CPU, ...) 
If this paper is not a gigantic breakthrough in our era of new technologies, it is yet a real improvement in our way to measure the energy consumption of embedded systems, as well by the speed of simulation this method offers as by its simplicity of use on every system.