InitRech 2015/2016, sujet 17

De Wiki d'activités IMA
Révision datée du 18 juin 2016 à 15:58 par Kle-van- (discussion | contributions) (Abstract)

Synthesis

This paper is the proposition of a method of energy characterization using non-intrusive measurements.
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work.
Hence our need to measure the energy consumption of every platform in order to improve them in energetic level.
For these measurements, we can built our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation form measures on a prototype.

The second section of the paper is about the state of the art of the non-intrusive measurement.
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method.

For the first criterion there are many methods that can be used to measure the enegy consumption :
- For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is an very accurate solution but a very long one to simulate.
- At the upper level of abstraction (architectural level), the system is divide in functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided in sub-blocks (whose energy consumption is known).
-At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform.

When we talk about the second criterion, the models are generalybased on datasheet informations and need a full knowledge of the underlying level architecture (low level hardware through VHDL and Verilog descriptions).