InitRech 2015/2016, sujet 17
Sommaire
Synthesis
Introduction
This paper is the proposition of a method of energy characterization using non-intrusive measurements.
Foremost, the author presents us the problematic : we are now able to build tiny platforms with tremendous processing power, but, this processing power needs a lot of energy to work.
Hence, our need to measure the energy consumption of every platform in order to improve them in energetic level.
For these measurements, we can build our models following several methods. The two mentioned are either electrical stimulation or inter/extrapolation from measures on a prototype.
State of the art
The second section of the paper is about the state of the art of the non-intrusive measurement.
This part deals with different methods used to characterize VLSI (Very Large Scale Integration) circuits. These VLSI circuits can be organized using two criteria : the level of hardware abstraction of the circuit and the calibration method.
For the first criterion there are many methods that can be used to measure the energy consumption :
- For the least abstract circuits, we can compute every change of state for all the transistors in the circuit. This is a very accurate solution but a very long one to simulate.
- At the upper level of abstraction (architectural level), the system is divided into functional units that can be represented by a specific model ( whose energy consumption is known). To be even more accurate, these units can be subdivided into sub-blocks (whose energy consumption is known).
-At the highest level of abstraction (instruction level), the models are based on events such as instructions execution and we measure the energy consumption by characterizing the inter-instruction energy consumption. This method is quite accurate but poorly represents the peripherals of the platform.
When we talk about the second criterion, the models are generally based on datasheet information and need a full knowledge of the underlying level architecture (low-level hardware through VHDL and Verilog descriptions).
Presentation and application
The third section is the presentation of the model the author wants to put forward, and I will talk about it in the "Main Contribution" part of my presentation of the paper.
Finally, the fourth section is a case study of a model construction using the method of the third section.
It essentially explains the creation of calibration benchmarks , the application of this benchmarks to build the models of the blocks used (CPU, Bus, memory and peripherals such as UART, interrupt, and timers).
Then, we have a presentation of the results in graphics where we can see the energy consumption per event depending on the clock period. We can see that energy consumption increases when frequency decreases.
Finally it presents the validation of the model. Indeed after running the simulation, the results were compared to physical measurements in order to validate or not the method.
The first thing that has been put forward is the speed of the method (less than 30 seconds by simulation). Then we have the accuracy, less than 10% error rate. Those two facts allied to the simplicity of implementation allow validating the model as a very good one.
Main Contribution
As we have seen it so far, VLSI circuits are organised according to their hardware level of abstraction, there are three levels from least to most abstract : transistor level , architectural level and instruction level.
For this method we will need to be in architectural abstraction level.
The system is then divided into functional blocks (CPU, Memory hierarchy, interconnection bus,peripherals,...) and we can have an application consumption Eapp by adding the individual consumption of each block Ebl.
Each block has its own energy consumtion model and for the CPU block to suit better to software developpment, we will write it at the instruction level of abstraction.
With Einsn the energy consummed by the instruction execution, Ecache and EMMU the cache and MMU( Memory management unit) overheads consumption.
We finally got : 
This method must have a time slot energy consumption an the chosen time slot is the CPU instruction execution for two main reasons :
-It's the finest time reference since the CPU generally have the highest clock frequency in an embedded system.
-The interrupt requests are managed at the end of this time slot.
The only thing left is to define every parameters that should be needed in order to have a simulation on behaviors and states of each component of the VLSI circuit.
As we have seen it in the last section, this method is validated because of its relative accuracy coupled with the simplicity of implementation and the speed of simulation.
